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Intel Quad-Core Xeon MP LV L7300 series processor (Tigerton LV)


Model name: Quad-Core Xeon MP LV L7300 series.
Code name: Tigerton LV.
Supplier: Intel.
Component class: CPU.


Generation: Core 2.


64 bit technology: EM64T.

Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.


L1 cache: (4x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Two-by-two shared L2 cache: (2x) 4 Mbyte.


266 MHz QDR Dedicated High Speed Interconnect (DHSI): connecting the CPU socket directly to the chipset on the motherboard (Multi Independent Bus, MIB); main memory talks to the chipset, not directly to the processor chips.

Memory protection: XD bit.

Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).

Virtualization Technology (VT, Vanderpool), with:

  • VT FlexMigration: enabling future processor generations to impersonate a previous generation, allowing virtual machines (vms) to live migrate to another processor generation without disturbing the architectural image that applications are having.


Quad-core technology: two Dual-Core dies in SMP (Symmetric Multi-Processing) configuration (Dual-Chip Module, DCM).

Symmetric Multi-Processing (SMP): supported through chipset.


Power management

Power management: Enhanced Intel SpeedStep Technology (EIST).

Clock speed

Clock speed Model Multiplier Introduction Order part numbers
266/1866 MHz Intel Quad-Core Xeon MP LV L7345 CPU 7 September 2007 OEM: LF80565JH0368M


Voltage: 1.10-1.25 V.
Power dissipation: 50 W TDP.

Manufacturing process: 65 nm (P1264).

Number of transistors: (2x) 291 million.

Die size: (2x) 143 mm2.

Packaging: Socket 604.

Thermal management

Thermal Monitor: TM1, TM2.

System management

Remote management: Intel Active Management (iAMT2).


Type Family Model Stepping Description
0x0 0x6 0xF 0xB stepping G0

Step level


Step levels: G0.

S-Spec / Stepping code

Model Code Stepping
Intel Quad-Core Xeon MP LV L7345 CPU SLA6B G0

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