Zone
X86 32 Bit Instruction Set Architecture (ISA)
The original 8086/8088
processor instructions:
-
AAA
ASCII Adjust After Addition
-
AAD
ASCII Adjust AX Before Division
-
AAM
ASCII Adjust AX After Multiply
-
AAS
ASCII Adjust AL After Subtraction
-
ADC
Add with Carry
-
ADD
Add
-
AND
Logical AND
-
CALL
Call Procedure
-
CBW
Convert Byte to Word
-
CLC
Clear Carry Flag
-
CLD
Clear Direction Flag
-
CLI
Clear Interrupt Flag
-
CMC
Complement Carry Flag
-
CMP
Compare Two Operands
-
CMPS/CMPSB/CMPSW
Compare String Operands
-
CWD
Convert Word to Doubleword
-
DAA
Decimal Adjust AL after Addition
-
DAS
Decimal Adjust AL after Subtraction
-
DEC
Decrement by 1
-
DIV
Unsigned Divide
-
HLT
Halt
-
IDIV
Signed Divide
-
IMUL
Signed Multiply
-
IN
Input from Port
-
INC
Increment by 1
-
INT n/INTO/INT 3
Call to Interrupt Procedure
-
IRET
Interrupt Return
-
Jcc (JA, JAE, JB, JBE, JC, JCXZ, JE, JG, JGE, JL, JLE,
JNA, JNAE, JNB, JNBE, JNC, JNE, JNG, JNGE, JNL, JNLE, JNO, JNP, JNS, JNZ,
JO, JP, JPE, JPO, JS, JZ)
Jump if Condition Is Met
-
JMP
Jump
-
LAHF
Load Status Flags into AH Register
-
LDS/LES
Load Far Pointer
-
LEA
Load Effective Address
-
LOCK
Assert LOCK# Signal Prefix
-
LODS/LODSB/LODSW
Load String
-
LOOP/LOOPE/LOOPNE/LOOPNZ/LOOPZ
Loop According to ECX Counter
-
MOV
Move
-
MOV
Move to/from Control Registers
-
MOV
Move to/from Debug Registers
-
MOVS/MOVSB/MOVSW
Move Data from String to String
-
MUL
Unsigned Multiply
-
NEG
Two’s Complement Negation
-
NOP
No Operation
-
NOT
One’s Complement Negation
-
OR
Logical Inclusive OR
-
OUT
Output to Port
-
POP
Pop a Value from the Stack
-
POPF
Pop Stack into EFLAGS Register
-
PUSH
Push Word, Doubleword or Quadword Onto the Stack
-
PUSHF
Push EFLAGS Register onto the Stack
-
RCL/RCR/ROL/ROR
Rotate
-
REP/REPE/REPZ/REPNE/REPNZ
Repeat String Operation Prefix
-
RET/RETN/RETF
Return from Procedure
-
SAHF
Store AH into Flags
-
SAL/SAR/SHL/SHR
Shift
-
SBB
Integer Subtraction with Borrow
-
SCAS/SCASB/SCASW
Scan String
-
STC
Set Carry Flag
-
STD
Set Direction Flag
-
STI
Set Interrupt Flag
-
STOS/STOSB/STOSW
Store String
-
SUB
Subtract
-
TEST
Logical Compare
-
WAIT
Wait
-
XCHG
Exchange Register/Memory with Register
-
XLAT/XLATB
Table Look-up Translation
-
XOR
Logical Exclusive OR
The original 8087 Floating-Point (FP)
coprocessor instructions:
-
ESC #
8087 Escape Opcodes
-
F2XM1
Compute 2x-1
-
FABS
Absolute Value
-
FADD/FADDP/FIADD
Add
-
FBLD
Load Binary Coded Decimal
-
FBSTP
Store BCD Integer and Pop
-
FCHS
Change Sign
-
FCLEX/FNCLEX
Clear Exceptions
-
FCOM/FCOMP/FCOMPP
Compare Floating Point Values
-
FDECSTP
Decrement Stack-Top Pointer
-
FDISI (deprecated)
Disable Interrupts
-
FDIV/FDIVP/FIDIV
Divide
-
FDIVR/FDIVRP/FIDIVR
Reverse Divide
-
FENI (deprecated)
Enable Interrupts
-
FFREE
Free Floating-Point Register
-
FICOM/FICOMP
Compare Integer
-
FILD
Load Integer
-
FINCSTP
Increment Stack-Top Pointer
-
FINIT/FNINIT
Initialize Floating-Point Unit
-
FIST/FISTP
Store Integer
-
FLD
Load Floating Point Value
-
FLD1/FLDL2T/FLDL2E/FLDPI/FLDLG2/FLDLN2/FLDZ
Load Constant
-
FLDCW
Load x87 FPU Control Word
-
FLDENV/FLDENVW
Load x87 FPU Environment
-
FMUL/FMULP/FIMUL
Multiply
-
FNDISI (deprecated)
Disable Interrupts, No Wait
-
FNENI (deprecated)
Enable Interrupts, No Wait
-
FNOP
No Operation
-
FNSAVE/FNSAVEW
Store x87 FPU State, No Wait
-
FNSTENV/FNSTENVW
Store x87 FPU Environment, No Wait
-
FPATAN
Partial Arctangent
-
FPREM
Partial Remainder
-
FPTAN
Partial Tangent
-
FRNDINT
Round to Integer
-
FRSTOR/FRSTORW
Restore x87 FPU State
-
FSAVE/FSAVEW
Store x87 FPU State
-
FSCALE
Scale
-
FSQRT
Square Root
-
FST/FSTP
Store Floating Point Value
-
FSTCW/FNSTCW
Store x87 FPU Control Word
-
FSTENV/FSTENVW
Store x87 FPU Environment
-
FSTSW/FNSTSW
Store x87 FPU Status Word
-
FSUB/FSUBP/FISUB
Subtract
-
FSUBR/FSUBRP/FISUBR
Reverse Subtract
-
FTST
TEST
-
FWAIT
Wait
-
FXAM
ExamineModR/M
-
FXCH
Exchange Register Contents
-
FXTRACT
Extract Exponent and Significand
-
FYL2X
Compute y * log2X
-
FYL2XP1
Compute y * log2(X+1)
Instructions added with the
80186/80188
processors:
-
BOUND
Check Array Index Against Bounds
-
ENTER
Make Stack Frame for Procedure Parameters
-
INS/INSB/INSW
Input from Port to String
-
LEAVE
High Level Procedure Exit
-
OUTS/OUTSB/OUTSW
Output String to Port
-
POPA
Pop All General-Purpose Registers
-
PUSHA
Push All General-Purpose Registers
Instructions added with the 80286
processors:
-
ARPL
Adjust RPL Field of Segment Selector
-
CLTS
Clear Task-Switched Flag in CRO
-
LAR
Load Access Rights Byte
-
LGDT/LIDT
Load Global/Interrupt Descriptor Table Register
-
LLDT
Load Local Descriptor Table Register
-
LMSW
Load Machine Status Word
-
LOADALL (undocumented)
Load All Registers
-
LSL
Load Segment Limit
-
LTR
Load Task Register
-
SGDT
Store Global Descriptor Table Register
-
SIDT
Store Interrupt Descriptor Table Register
-
SLDT
Store Local Descriptor Table Register
-
SMSW
Store Machine Status Word
-
STR
Store Task Register
-
VERR/VERW
Verify a Segment for Reading or Writing
Floating-Point (FP) instructions added with the
80287 coprocessors:
-
FSETPM
Set Protected Mode (deprecated)
Instructions added with the 80386
processors:
-
BSF
Bit Scan Forward
-
BSR
Bit Scan Reverse
-
BT
Bit Test
-
BTC
Bit Test and Complement
-
BTR
Bit Test and Reset
-
BTS
Bit Test and Set
-
CDQ
Convert Doubleword to Quadword
-
CMPSD
Compare String Operands
-
CWDE
Convert Word to Doubleword
-
INSD
Input from Port to String
-
IRETD/IRETDF/IRETF
Interrupt Return
-
JECXZ
Jump if rCX Zero
-
LFS/LGS/LSS
Load Far Pointer
-
LOADALL (undocumented)
Load All Registers
-
LODSD
Load String
-
LOOPD/LOOPED/LOOPNED/LOOPNZD/LOOPZD
Loop According to ECX Counter
-
MOVSD
Move Data from String to String
-
MOVSX
Move with Sign-Extension
-
MOVZX
Move with Zero-Extend
-
OUTSD
Output String to Port
-
POPAD
Pop All General-Purpose Registers
-
POPFD
Pop Stack into EFLAGS Register
-
PUSHAD
Push All General-Purpose Registers
-
PUSHD
Push Word, Doubleword or Quadword Onto the Stack
-
PUSHFD
Push EFLAGS Register onto the Stack
-
SCASD
Scan String
-
SETcc (SETA, SETAE, SETB, SETBE, SETC, SETE, SETG,
SETGE, SETL, SETLE, SETNA, SETNAE, SETNB, SETNBE, SETNC, SETNE, SETNG,
SETNGE, SETNL, SETNLE, SETNO, SETNP, SETNS, SETNZ, SETO, SETP, SETPE,
SETPO, SETS, SETZ)
Set Byte on Condition
-
SHLD
Double Precision Shift Left
-
SHRD
Double Precision Shift Right
-
STOSD
Store String
Floating-Point (FP) instructions added with the
80387 coprocessors:
-
FCOS
Cosine
-
FLDENVD
Load x87 FPU Environment
-
FNSAVED
Store x87 FPU State, No Wait
-
FNSTENVD
Store x87 FPU Environment, No Wait
-
FPREM1
Partial Remainder
-
FRSTORD
Restore x87 FPU State
-
FSAVED
Store x87 FPU State
-
FSIN
Sine
-
FSINCOS
Sine and Cosine
-
FSTENVD
Store x87 FPU Environment
-
FUCOM/FUCOMP/FUCOMPP
Unordered Compare Floating Point Values
Instructions added with the 80486
processors:
-
BSWAP
Byte Swap
-
CMPXCHG
Compare and Exchange
-
CPUID (introduced in SL Enhanced models)
CPU Identification
-
INVD
Invalidate Internal Caches
-
INVLPG
Invalidate TLB Entry
-
RSM (introduced in SL Enhanced models)
Resume from System Management Mode
-
WBINVD
Write Back and Invalidate Cache
-
XADD
Exchange and Add
Instructions added with the Pentium
processors:
-
CMPXCHG8B
Compare and Exchange Bytes
-
RDMSR
Read from Model Specific Register
-
RDTSC
Read Time-Stamp Counter
-
WRMSR
Write to Model Specific Register
Integer instructions added with the Pentium Pro
processors:
-
CMOVcc (CMOVA, CMOVAE, CMOVB, CMOVBE, CMOVC, CMOVE,
CMOVG, CMOVGE, CMOVL, CMOVLE, CMOVNA, CMOVNAE, CMOVNB, CMOVNBE, CMOVNC,
CMOVNE, CMOVNG, CMOVNGE, CMOVNL, CMOVNLE, CMOVNO, CMOVNP, CMOVNS, CMOVNZ,
CMOVO, CMOVP, CMOVPE, CMOVPO, CMOVS, CMOVZ)
Conditional Move
-
RDPMC
Read Performance-Monitoring Counters
-
SYSCALL (AMD version of SYSENTER)
Fast System Call
-
SYSENTER
Fast System Call
-
SYSEXIT
Fast Return from Fast System Call
-
SYSRET (AMD version of SYSEXIT)
Return From Fast System Call
-
UD2
Undefined Instruction
Floating-Point instructions added with the
Pentium Pro processors:
-
FCMOVcc (FCMOVB, FCMOVBE, FCMOVE, FCMOVNB, FCMOVNBE, FCMOVNE, FCMOVNU, FCMOVU)
Floating-Point Conditional Move
-
FCOMI/FCOMIP/FUCOMI/FUCOMIP
Compare Floating Point Values and Set EFLAGS
Instructions added with the K6-2
processors:
-
SYSCALL (AMD version of SYSENTER)
Fast System Call
-
SYSRET (AMD version of SYSEXIT)
Fast Return from Fast System Call
Instructions added with the
Pentium MMX
processors:
-
RDPMC
Read Performance-Monitoring Counters