The ChipList, by Adrian Offerman; The Processor Portal

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K10 and SSE4a Instruction Set Architecture (ISA) Extension

Instructions added with the K10 processors:

  • LZCNT
    Count Leading Zeroes
  • POPCNT
    Population Count

SSE4a instructions added with the K10 processors:

  • EXTRQ
    Extract Field From Register
  • INSERTQ
    Insert Field
  • MOVNTSD
    Move Non-Temporal Scalar Double-Precision Floating-point
  • MOVNTSS
    Move Non-Temporal Scalar Single-Precision Floating-Point