The ChipList, by Adrian Offerman; The Processor Portal

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Processor Selector

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Added with 80386 Instruction Set Architecture (ISA)

Instructions added with the 80386 processors:

  • BSF
    Bit Scan Forward
  • BSR
    Bit Scan Reverse
  • BT
    Bit Test
  • BTC
    Bit Test and Complement
  • BTR
    Bit Test and Reset
  • BTS
    Bit Test and Set
  • CDQ
    Convert Doubleword to Quadword
  • CMPSD
    Compare String Operands
  • CWDE
    Convert Word to Doubleword
  • INSD
    Input from Port to String
  • IRETD/IRETDF/IRETF
    Interrupt Return
  • JECXZ
    Jump if rCX Zero
  • LFS/LGS/LSS
    Load Far Pointer
  • LOADALL (undocumented)
    Load All Registers
  • LODSD
    Load String
  • LOOPD/LOOPED/LOOPNED/LOOPNZD/LOOPZD
    Loop According to ECX Counter
  • MOVSD
    Move Data from String to String
  • MOVSX
    Move with Sign-Extension
  • MOVZX
    Move with Zero-Extend
  • OUTSD
    Output String to Port
  • POPAD
    Pop All General-Purpose Registers
  • POPFD
    Pop Stack into EFLAGS Register
  • PUSHAD
    Push All General-Purpose Registers
  • PUSHD
    Push Word, Doubleword or Quadword Onto the Stack
  • PUSHFD
    Push EFLAGS Register onto the Stack
  • SCASD
    Scan String
  • SETcc (SETA, SETAE, SETB, SETBE, SETC, SETE, SETG, SETGE, SETL, SETLE, SETNA, SETNAE, SETNB, SETNBE, SETNC, SETNE, SETNG, SETNGE, SETNL, SETNLE, SETNO, SETNP, SETNS, SETNZ, SETO, SETP, SETPE, SETPO, SETS, SETZ)
    Set Byte on Condition
  • SHLD
    Double Precision Shift Left
  • SHRD
    Double Precision Shift Right
  • STOSD
    Store String