Added with 80286 Instruction Set Architecture (ISA)

Instructions added with the 80286 processors:

• ARPL
  Adjust RPL Field of Segment Selector
• CLTS
  Clear Task-Switched Flag in CRO
• LAR
  Load Access Rights Byte
• LGDT/LIDT
  Load Global/Interrupt Descriptor Table Register
• LLDT
  Load Local Descriptor Table Register
• LMSW
  Load Machine Status Word
• LOADALL (undocumented)
  Load All Registers
• LSL
  Load Segment Limit
• LTR
  Load Task Register
• SGDT
  Store Global Descriptor Table Register
• SIDT
  Store Interrupt Descriptor Table Register
• SLDT
  Store Local Descriptor Table Register
• SMSW
  Store Machine Status Word
• STR
  Store Task Register
• VERR/VERW
  Verify a Segment for Reading or Writing