The ChipList, by Adrian Offerman; The Processor Portal

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19.6.1  Intel Core 2 Extreme X7xxx series mobile processor (Merom XE)

Identification


Model name: Core 2 Extreme X7xxx series.
Code name: Merom XE.
Supplier: Intel.
Component class: CPU.

Generation


Generation: Core 2.

Compatibility


Dual-core technology.

64 bit technology: EM64T.

Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.

Cache


L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Shared L2 cache: 4 Mbyte.

Architecture


100-200 MHz QDR bus (Dynamic Front-Side Bus Frequency Switching).

Memory protection: XD bit.

Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).

Virtualization Technology (VT, Vanderpool).

Multi-processing


Dual-core technology.

Multiplier


Unlocked clock multiplier.

Power management


Power management: Enhanced Intel SpeedStep Technology (EIST).

Clock speed


Clock speed Model Multiplier Introduction Order part numbers
200/2600 MHz Intel Core 2 Extreme X7800 CPU 13 (unlocked) July 2007 OEM: LF80537GG0644M
200/2800 MHz Intel Core 2 Extreme X7900 CPU 14 (unlocked) July 2007 OEM: LF80537GG0724M

Physics


Voltage:

  • stepping E1: 1.10-1.375 V (1.0375-1.30 V),
  • stepping G0: 1.125-1.325 V (1.0375-1.30 V).

Power dissipation: 34 W TDP.

Temperature: 0-100 °C.

Manufacturing process: 65 nm (P1264).

Number of transistors: 291 million.

Die size: 143 mm2.

Packaging: Socket P.

System management


Remote management: Intel Active Management (iAMT2).

CPUID32


Type Family Model Stepping Description
0x0 0x6 0xF 0xA stepping E1
0x0 0x6 0xF 0xB stepping G0

Step level


Text:

Step levels: E1, G0.

S-Spec / Stepping code


Model Code Stepping
Intel Core 2 Duo X7900 CPU SLA33 E1
Intel Core 2 Duo X7800 CPU SLA6Z E1
Intel Core 2 Duo X7900 CPU SLAF4 G0

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