The ChipList, by Adrian Offerman; The Processor Portal

new
Processor Selector

Platform:
Segment:
Tree: collapse / expand
View: show / edit

bookmark bookmark site
bookmark permalink

19.13.6  Intel Dual-Core Xeon MP E7200 series processor (Tigerton-DC)

Identification


Model name: Dual-Core Xeon MP E7200 series.
Code name: Tigerton-DC.
Supplier: Intel.
Component class: CPU.

Generation


Generation: Core 2.

Compatibility


64 bit technology: EM64T.

Multimedia instruction sets: MMX, SSE, SSE2, SSE3, SSSE3.

Cache


L1 cache: (2x) 32 kbyte instruction cache, 32 kbyte data cache (Harvard architecture).
Two-by-two shared L2 cache: (2x) 4 Mbyte (one per available core).

Architecture


266 MHz QDR Dedicated High Speed Interconnect (DHSI): connecting the CPU socket directly to the chipset on the motherboard (Multi Independent Bus, MIB); main memory talks to the chipset, not directly to the processor chips.

Memory protection: XD bit.

Protected program execution environment: Trusted Execution Technology (TXT; LaGrande Technology, LT).

Virtualization Technology (VT, Vanderpool), with:

  • VT FlexMigration: enabling future processor generations to impersonate a previous generation, allowing virtual machines (vms) to live migrate to another processor generation without disturbing the architectural image that applications are having.

Multi-processing


Quad-core technology: two Dual-Core dies in SMP (Symmetric Multi-Processing) configuration (Dual-Chip Module, DCM).
Only one core per die available; other core disfunctional/disabled.

Symmetric Multi-Processing (SMP): supported through chipset.

Multiplier


Power management


Power management: Enhanced Intel SpeedStep Technology (EIST).

Clock speed


Clock speed Model Multiplier Introduction Order part numbers
266/2400 MHz Intel Duad-Core Xeon MP E7210 CPU 9 September 2007 OEM: LF80564QH0568M
266/2933 MHz Intel Duad-Core Xeon MP E7220 CPU 11 September 2007 OEM: LF80564QH0778M

Physics


Voltage: 1.200-1.325 V.
Power dissipation: 80 W TDP.

Manufacturing process: 65 nm (P1264).

Number of transistors: (2x) 291 million.

Die size: (2x) 143 mm2.

Packaging: Socket 604.

Thermal management


Thermal Monitor: TM1, TM2.

System management


Remote management: Intel Active Management (iAMT2).

CPUID32


Type Family Model Stepping Description
0x0 0x6 0xF 0xB stepping G0

Step level


Text:

Step levels: G0.

S-Spec / Stepping code


Model Code Stepping
Intel Dual-Core Xeon MP E7220 CPU SLA6C G0
Intel Dual-Core Xeon MP E7210 CPU SLA6D G0

Page viewed 18235 times since Sun 1 Mar 2009, 0:00.