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20.3.4  AMD Opteron 2P HE 2300 series Quad-Core processor (Barcelona, High Efficiency)

Identification


Model name: Opteron 2P HE 2300 series Quad-Core.
Code name: Barcelona, High Efficiency.
Family name: Cities.
Supplier: AMD.
Component class: CPU.

Generation


Generation: K10.

Compatibility


64 bit technology: AMD64.

Multimedia instruction sets: MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, SSE4a.

Cache


Balanced Smart Cache:

  • L1 cache: (4x) 64 kbyte instruction cache, 64 kbyte data cache (Harvard architecture),
    both 2-way set-associative,
  • L2 cache: (4x) 512 kbyte,
    8-way set-associative,
  • shared L3 cache: 2 Mbyte,
    32-way set-associative.

Architecture


128 bit (decoupled dual-channel), 166/333/667 MHz, Registered DDR2-667 memory controller, supporting ECC (Error-Correcting Code): max. 8 x 512 Mbyte = 4 Gbyte (4 x 1 Gbyte double-sided PC2-5300R (ECC) memory module) per processor.

1000 MHz HyperTransport 2.0 bus.

Memory protection: NX bit (Enhanced Virus Protection, EVP).

Virtualization technology: AMD Virtualization (AMD-V, Pacifica), with:

  • Rapid Virtualization Indexing: Nested Page Tables, virtual-to-physical address translation by memory controller,
  • Tagged TLB (Translation Look-aside Buffer): linking memory pages to virtual machines, no need for TLB flushes when switching virtual environments,
  • Device Exclusion Vector (DEV): managing access to memory pages by virtual machines,
  • Extended Migration: allowing virtual machines to be live migrated over the full range of Opteron processors.

Multi-processing


Quad-core technology: four cores connected through Internal System Request Queue Crossbar.

Multi-processor support: dual processor, connected through HyperTransport bus.

Multiplier


Power management


Power management: Enhanced PowerNow!, with:

  • CoolCore Technology: turning off unused parts of the processor,
  • Independent Dynamic Core Technology: the clock multiplier of each core can be set independently of the other cores,
  • Dual Dynamic Power Management (DDPM): a split power plane provides an independent power supply to the cores and to the memory controller.

Clock speed


Clock speed Model Multiplier Introduction Order part numbers
200/1700 MHz AMD Opteron 2344 HE Quad-Core CPU 8.5 September 2007 OEM (stepping B1): OS2344PAL4BGC,
OEM (stepping BA): OS2344PAL4BGE,
OEM (stepping B3): OS2344PAL4BGH,
WOF (stepping B3): OS2344PAL4BGHWOF
200/1800 MHz AMD Opteron 2346 HE Quad-Core CPU 9 September 2007 OEM (stepping B1): OS2346PAL4BGC,
OEM (stepping BA): OS2346PAL4BGE,
WOF (stepping BA): OS2346PAL4BGEWOF,
OEM (stepping B2): OS2346PAL4BGD,
WOF (stepping B2): OS2346PAL4BGDWOF,
OEM (stepping B3): OS2346PAL4BGH,
WOF (stepping B3): OS2346PAL4BGHWOF
200/1900 MHz AMD Opteron 2347 HE Quad-Core CPU 9.5 September 2007 OEM (stepping B1): OS2347PAL4BGC,
OEM (stepping BA): OS2347PAL4BGE,
WOF (stepping BA): OS2347PAL4BGEWOF,
OEM (stepping B2): OS2347PAL4BGD,
WOF (stepping B2): OS2347PAL4BGDWOF,
OEM (stepping B3): OS2347PAL4BGH,
WOF (stepping B3): OS2347PAL4BGHWOF

Physics


Voltage: 1.15 V.
Power dissipation: 55 W ACP, 68 W TDP.

Temperature: max. 55-71 °C.

Manufacturing process: fourth generation 65 nm, SoI (Silicon-on-Insulator), DSL (Dual Stress Liner), e-SiGe (embedded Silicon Germanium).

Number of transistors: 463 million (dimensioned for 600 million).

Die size: 285 mm2.

Packaging: Socket F.

Manufactured in: AMD Fab 36, Dresden, Germany.

Step level


Text:

Step levels:

  • A0: prototypes,
  • B0 (April 2007): speed path problems,
  • B1: first introduction,
  • BA (September 10, 2007): first production,
  • B2: production,
  • B3 (April 9, 2008): full production.

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